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Intel Many Integrated Core Architecture or Intel MIC (pronounced ''Mick'' or ''Mike'') is a coprocessor computer architecture developed by Intel incorporating earlier work on the Larrabee many core architecture, the Teraflops Research Chip multicore chip research project, and the Intel Single-chip Cloud Computer multicore microprocessor. Prototype products codenamed ''Knights Ferry'' were announced and released to developers in 2010. The ''Knights Corner'' product was announced in 2011 and uses a 22 nm process. A second generation product codenamed ''Knights Landing'' using a 14 nm process was announced in June 2013. In September 2011, the Texas Advanced Computing Center (TACC) announced it would use Knights Corner cards in their 10 petaFLOPS "Stampede" supercomputer, providing 8 petaFLOPS of computing power. At the International Supercomputing Conference (2012, Hamburg), Intel announced the branding of the processor product family as Intel Xeon Phi.〔 In November 2012, Intel formally announced the first products citing claims of CPU-like versatile programmability, high performance and power efficiency.〔(【引用サイトリンク】url=http://newsroom.intel.com/community/intel_newsroom/blog/2012/11/12/intel-delivers-new-architecture-for-discovery-with-intel-xeon-phi-coprocessors )〕 The Green 500 list placed a system using these new products as the most power efficient computer in the world.〔(【引用サイトリンク】url=http://www.green500.org/news/green500-list-november-2012 )〕 In June 2013, the Tianhe-2 supercomputer at the National Supercomputing Center in Guangzhou (NSCC-GZ) was announced as the world's fastest supercomputer. It utilizes Intel Xeon Phi coprocessors and Ivy Bridge-EP Xeon processors to achieve 33.86 petaFLOPS.〔(【引用サイトリンク】title=Intel Powers the World's Fastest Supercomputer, Reveals New and Future High Performance Computing Technologies )〕 ==History== 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Xeon Phi」の詳細全文を読む スポンサード リンク
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